Issues

• [Bug Report]ebu: a wait state on a data transfer drops the first beat of the next I$ line fill, so the core executes a corrupted instruction

  openhwfoundation/cvw#2116 · Filter by author qinkejiu opened on Nov 9, 2026
  4

• How to run the External Debug tests on Wally (draft PRs)

  openhwfoundation/cvw#2114 · Filter by author davidharrishmc opened on Nov 9, 2026

• hypervisor branch: VU fetch access fault reported as cause 22, misa.H=0, and mstatus.FS ignored at V=1

  openhwfoundation/cvw#2110 · Filter by author davidharrishmc opened on Nov 9, 2026
  1

• Verilator code coverage

  enhancement
  openhwfoundation/cvw#2098 · Filter by author jordancarlin opened on Nov 7, 2026
  4

• Run regression-wally in CI

  enhancement
  openhwfoundation/cvw#2074 · Filter by author jordancarlin opened on Nov 5, 2026
  2

• Debug (#1590): Debug 1.0 violations found by the per-rule tests

  enhancement
  openhwfoundation/cvw#2072 · Filter by author davidharrishmc opened on Nov 4, 2026
  1

• FORCE-RISCV on rv64gc: how to reproduce, and results

  enhancement
  openhwfoundation/cvw#1980 · Filter by author davidharrishmc opened on Oct 12, 2026

• Setup continuous FPGA regression test and performance validation

  enhancement
  openhwfoundation/cvw#780 · Filter by author rosethompson opened on May 6, 2024

• More tests in nightly regression

  enhancement
  openhwfoundation/cvw#779 · Filter by author davidharrishmc opened on May 6, 2024
  6

• Testfloat on Verilator not progressing

  enhancement
  openhwfoundation/cvw#707 · Filter by author davidharrishmc opened on Apr 4, 2024
  7