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fix(ifp): satisfy minimum area rules for power vias - #341

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ZhishengZeng merged 1 commit into
mainfrom
fp_main
Nov 6, 2026
Merged

ZhishengZeng merged 1 commit into
mainfrom
fp_main

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What Changed

  • Enforce each routing layer's LEF AREA rule when selecting generated power-via geometry.
  • Grow only deficient enclosure dimensions, aligned to the manufacturing grid and bounded by the original via footprint. Try both axes; preserve already-compliant vias and reject infeasible candidates instead of widening rails or stripes.
  • Keep generated IDB shapes, cached via stacks and DEF export consistent.
  • Add regressions for narrow pads, rotated footprints, manufacturing grids, two-axis growth, infeasible footprints, unchanged wide vias, complete stacks and DEF round trips.
  • Follow-up to fix(ifp): preserve rail widths and handle narrow endcap rows #340; this PR contains only commit 257a50a3c.

Scope

  • C++ core/database/EDA integration
  • Python API or native bindings
  • Geometry, placement, timing, DRC, or evaluation behavior
  • Build/package - CMake, wheel, manylinux, or dependencies
  • CI/release - GitHub Actions, version checks, or release automation
  • Tests/docs only

Runtime And Packaging Impact

  • No runtime or packaging impact
  • C++ runtime behavior or native ABI changed
  • Python API or extension module behavior changed
  • Wheel contents or supported platform changed
  • CMake, compiler, dependency, or toolchain requirement changed
  • Release artifact or version metadata changed

Notes:

  • Changes are confined to iFP. No Tcl/Python API or configuration changes, dependency changes, DRC rule relaxation or process/case-specific production constants.
  • An undersized candidate that cannot satisfy AREA inside its footprint is rejected. Existing connectivity validation remains active.
  • Rail/stripe widths remain unchanged. Existing longitudinal stripe extension may cover the enlarged legal pad.

Validation

  • C++ formatting: automated formatter not run; reviewed scoped changes and ran git diff --check.
  • Native build: cmake --build build --target test_ifp_pdn_generator test_ifp_phy_placer test_ifp_config ecc_bin ecc_py --parallel 12.
  • Wheel build: not run.
  • Focused Python API integration: python -m pytest test/operations/test_python_operations.py::test_floorplan -q passed using the rebuilt extension.
  • Focused native tests: ctest --test-dir build -R '^test_ifp_(config|pdn_generator|phy_placer)$' --output-on-failure: 3/3 passed.
  • Actual floorplan-stage iDRC before/after using the same checker and technology:
    • William_MCU utilization 0.50: 592 minimum-area violations -> 0 total DRC.
    • William_MCU utilization 0.45: 624 minimum-area violations -> 0 total DRC.
    • Ppu, Multiplier and ecos_pad_ring: 0 -> 0 total DRC.
  • Original four fixtures completed DEF write/read/write. ROW, DIEAREA, COMPONENTS, PINS and NETS remained unchanged; rail widths stayed 160 DBU; PG types and name separation were preserved; no ROUTEHALO output.
  • All four retain byte-identical power.ploc files and zero floating-rail fragments in the supplied independent coverage screen.
  • William_MCU's corrected intermediate-layer pads are 370 x 142 DBU instead of 370 x 100. One edge stripe extends longitudinally by 26 DBU through existing coverage logic; it is not widened.
  • git diff --check.

Skipped checks and remaining risk:

  • Full rerouting and external signoff DRC/LVS/EMIR were not rerun. The results above are floorplan-stage iDRC, focused native/Python tests and connectivity/coverage regression, not a full signoff claim.
  • Distributable wheel and the complete Python test suite were not run.
  • Private designs, PDK files, generated artifacts and agent state are not included.

Checklist

  • I kept the change scoped to ecc-tools/iFP.
  • Behavior changes and validation limits are documented above; no user-facing option changes.
  • No dependency/version metadata changes are required.
  • No new CMake, compiler or platform requirements.
  • I did not include local caches, virtual environments, or generated build outputs.
  • I explained skipped validation and remaining risk.

@ZhishengZeng
ZhishengZeng merged commit ea6231d into main Nov 6, 2026
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2 participants